Z-turn-Board-V2-Diary

Vitis:

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ERROR: libssl.so.10 missing

• Solution: Run vitis using:
  • $ Exec=env LD_LIBRARY_PATH=/path/to/Vitis/2023.2/tps/lnx64/cmake-3.24.2/libs/Ubuntu:$LD_LIBRARY_PATH /path/to/Vitis/2023.2/bin/vitis
• (Source: AUR[Vitis]@Archlinux)

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ERROR: Segmentation fault: (question@Xilinx):

Command:

/path/to/Vitis/2023.2/bin/unwrapped/lnx64.o/rlwrap -rc -b “(){}[],+= & ^%$#@””;

\” -f /path/to/Vitis/2023.2/scripts/xsdb/xsdb/cmdlist -H /home/.xsdbcmdhistory /path/to/Vitis/2023.2/bin/loader -exec rdi_xsdb -n -interactive /home/.Xilinx/Vitis/2023.2/.vitisng/temp_xsct_launch_script.tcl

Solution:

• Replace rlwrap with system’s:
  • $ rm /path/to/Vitis/2023.2/bin/unwrapped/lnx64.o/rlwrap
  • $ install rlwrap
  • $ ln -s /usr/bin/rlwrap /path/to/Vitis/2023.2/bin/unwrapped/lnx64.o/rlwrap

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EXTRA: Dependencies:

• xlsclients

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ERROR: Could not read hardware specifications

• Vitis cannot open [generated] .xsa directly.. (Question@Xilinx).

Solution

• [In Vitis], Create new component/platform, incorporating the generated .xsa

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Vivado:

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ERROR: No default clock is selected

• Limit to single clock under: Block_design/Platform_setup
• Ref: chinese site

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https://support.xilinx.com/s/question/0D52E00006hpUdBSAU/packagename-is-not-compiled-in-library-xildefaultlib?language=en_US&t=1710006878232

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difference in simulations: behavioural vs post-synthesys:

add appropriate signals to process’ sensitivity list

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Petalinux:

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ERROR: Board stuck at boot:

Solution: Ensure ‘bitstream’ was included when $ petalinux-package